Position Title: V&V FPGA Engineer II

Role Description:
We are seeking a V&V FPGA Engineer II to join our Verification and Validation (V&V) team. The ideal candidate will be responsible for ensuring the accuracy and integrity of FPGA designs, working closely with both the V&V and R&D teams to provide technical expertise in verification and validation. This position requires proficiency in RTL design, FPGA lifecycle development, and the ability to lead verification efforts for FPGA-based safety systems.

General Responsibilities:
• Review of FPGA documentations such as Requirement Specifications, Design Specifications, Source Code, R&D FPGA
Component Test Plans/Specifications/Results and R&D System Integration Test Plans/Specifications/Results to ensure
accuracy and completeness in compliance with relevant codes, standards, and specifications.
• Find design flaws or areas of improvement and provide feedback and recommendations to R&D department based on review findings.
• Perform Source Code Review, Generate V&V FPGA Component Test document including development of test plans, test
designs, test cases, write test procedures and be able to execute component level simulation.
• Understand and perform verification evaluation and analysis on FPGA Safety/Interface/Traceability.
• Collaborate with V&V team members to track development through the V&V life cycle, participate in the preparation of
V&V lifecycle reports describing the V&V FPGA Tasks performed and conclusions of the tasks and create an overall summary report.
• Participate in technical reviews of FPGA design to support R&D development process and ensure technical integrity of the FPGA deliverables.

Qualifications:
1. Minimum Skills & Experience Required:
• Experience with FPGA development lifecycle and tools used in requirement management and configuration management.
• Proficiency in RTL design (Verilog preferred) and experience with Siemens or Microsemi development/simulation environment.
• Good work ethics
• Proficiency in written and verbal communication

2. Preferred skills but not required:
• Understanding or experience with IEEE Std 1012
• Understanding and experience with EPRI TR-107330
• Familiarity with Reliability Analysis, Failure Modes and Effects Analysis
• Experience with System Verilog/C/QNX/Assembly language is a plus.

3. Education / Experience requirements:
• B.S. or M.S. in Electrical Engineering
• Minimum 5 years of experience in FPGA development, verification or testing.

Stipend: To be confirmed after interview
Working Hour: Monday – Friday (40 hours/week)

Fringe Benefits:
• 401(k)
• Flexible spending account
• Health insurance
• Dental insurance
• Vision insurance
• Life insurance
• Paid time off

*Please note that the company does not accept J-1 or J-1 transfer applicants for this position.

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